This listing was posted on ITJobsWeb.
Physical Design Power Optimization Engineer
Location:
Hillsboro, OR
Description:
Job Description Do Something Wonderful! Intel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let's do something wonderful together. Join us, because at Intel, we are building a better tomorrow. Want to learn more? Visit our YouTube Channel or the links below! Life at Intel Diversity at Intel Intel Foundry Services (IFS) is an independent foundry business that is established to meet our customers' unique product needs. With the first Open System Foundry model in the world, our combined offerings of wafer fabrication, advanced process, and packaging technology, chiplet, software, robust ecosystem, and assembly and test capabilities help our customers build their innovative silicon designs and deliver full end-to-end customizable products from Intel's secure, resilient, and sustainable source of supply. This job opportunity in IFS will be part of the Customer Solutions Engineering (CSE) group which is responsible for the portions of the system foundry that brings the best of Intel technologies to IFS customers, differentiating and accelerating their solutions from architecture to post-silicon validation.As a Physical Design Power Optimization Engineer, your will: Design and validate power management solutions, drive power delivery technology innovation, and enable power management and conversion components. Understand multi-voltage and low power design including UPF/CPF and VCLP. Drive power estimation calculations and methodology for project planning. Perform power analysis and drives reduction techniques for dynamic and static power. Utilize Spice & Monte Carlo simulation skills to enable PPA exploration and tradeoffs. Work with the clock team on methodologies for power improvements, targets and clock simulations. Additional ability to performs timing analysis and timing optimization is preferred. The Physical Design Power Optimization Engineer should possess the following attributes : Excellent communication and leadership skills. Self-driven with ability to prioritize work and accomplish tasks quickly with good problem-solving skills. Must be detail oriented with solid written and verbal communication for expressing technical ideas and initiatives. Comfortable task switching and managing multiple tasks at the same time. Qualifications Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. What we need to see (Minimum Qualifications): Bachelor or Master of Science degree in Electrical Engineering or Computer Engineering or related field of study. 7+ years of related industry experience 3+ years of power analysis and optimization experience. How to Stand out (Preferred Qualifications): Post graduate degree Electrical Engineering, Computer Engineering, Computer Science, or in a related field of study. Demonstrate experience and hands-on practical knowledge with standard-cell based VLSI design methodology and relevant industry standard EDA tools. Experience with Synopsys PrimePower / PTPX or Cadence Joules. Demonstrate strong analytical and problem solving skills through relevant experiences with ASIC/SOC design convergence. Experience with Spice & Monte Carlo simulation. Demonstrate experience in scripting with Unix shell, Perl and TCL. Good understanding of digital design, circuits, layout with a thorough understanding of CMOS processes Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research Amazing Benefits! Here at Intel, we invest in our people. Beyond health, dental, and retirement benefits, Intel's benefits package includes 14 paid holidays per calendar year, three weeks of paid vacation, and four-week paid sabbatical every four years of employment. Intel also offers employees five bonuses per year dependent on overall company and personal performance, and an employee stock purchase program. Find more information about our Amazing Benefits here : https://jobs.intel.com/benefits Inside this Business Group Intel Foundry is dedicated to transforming the global semiconductor industry by delivering cutting-edge silicon process and packaging technology leadership for the AI era. As stewards of Moore's Law, we innovate and foster collaboration within an extensive partner ecosystem to advance technologies and enable our customers to design leadership products. Our strategic investments in geographically diverse manufacturing capacities bolster the resilience of the semiconductor supply chain. Leveraging our technological prowess, expansive manufacturing scale, and a more sustainable supply chain, Intel Foundry empowers the world to deliver essential computing, server, mobile, networking, and automotive systems for the AI era. This position is part of the Foundry Services business unit within Intel Foundry, a customer-oriented service organization that is dedicated to the success of its customers with full P&L responsibilities. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments. Other Locations US, TX, Austin; US, AZ, Phoenix; US, CA, Santa Clara Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here. Annual Salary Range for jobs which could be performed in US, California: $144,501.00-$217,311.00*Salary range dependent on a number of factors including location and experience Working Model This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs. Requisition #: JR0256713pca3lyuhf
Company:
Intel
Posted:
May 4 on ITJobsWeb
Visit Our Partner Website
This listing was posted on another website. Click here to open: Go to ITJobsWeb
Important Safety Tips
- Always meet the employer in person.
- Avoid sharing sensitive personal and financial information.
- Avoid employment offers that require a deposit or investment.
To learn more, visit the Safety Center or click here to report this listing.
More About this Listing: Physical Design Power Optimization Engineer
Physical Design Power Optimization Engineer is a Engineering Engineer Job at Intel located in Hillsboro OR. Find other listings like Physical Design Power Optimization Engineer by searching Oodle for Engineering Engineer Jobs.
Physical Design Power Optimization Engineer is a Engineering Engineer Job at Intel located in Hillsboro OR. Find other listings like Physical Design Power Optimization Engineer by searching Oodle for Engineering Engineer Jobs.